The wideband high-power amplifier is a core technology used in a variety of applications, such as electronic warfare. Nowadays, the gallium nitride (GaN) high electron mobility transistor (HEMT) technology is considered to replace conventional traveling wave tube amplifier system because of its high breakdown voltage, high power density, and high saturation velocity [1]. The common circuit topologies for implementing the wideband power amplifier (PA) are distributed power amplifier (DPA) and reactively matched power amplifier. In the DPA design, transistor input or output capacitances do not limit the bandwidth of the PA circuit. Therefore, DPA is considered the best solution for the wideband PA design.

However, the DPA commonly suffers from low gain. To overcome this disadvantage, the DPA is designed by a cascade of unit distributed amplifiers (DAs), matrix DA, or cascaded single-stage DA (CSSDA). Although matrix DA or CSSDA is a good solution for high-gain DA, the bias circuits of some transistors are difficult to implement in the layout of matrix DA or CSSDA because of their grid-shaped layout.

This study describes the feasibility of self-biasing through feedback resistor topology applied to GaN PA monolithic microwave integrated circuit (MMIC) and presents the application of a self-biasing circuit to a two-stage CSSDA-based DPA.

The self-biasing circuit through a feedback resistor is commonly used in gallium arsenide (GaAs) common source amplifiers [2]. This biasing scheme has the benefit of removing the negative gate DC voltage bias of a HEMT transistor and a complex gate bias network. However, the voltage drop across a series feedback resistor reduces the efficiency of PA. Therefore, the self-biasing circuit has not been considered to be applied to PA.

In the case of traditional microwave transistor technology, such as GaAs HEMT, the drain–source bias voltage is typically about 5 V, and typical GaN HEMT drain-source bias voltage is 20–40 V. Therefore, the voltage drop portion of a feedback resistor is much smaller in the GaN case, thus resulting in a less efficient drop. In our case of a 0.25 μm GaN HEMT, the operation drain–source bias voltage is 28 V, and only 6.7% of the DC power is wasted. Therefore, with GaN HEMT technology, self-biasing through a feedback resistor can be one of the solutions for biasing.

The self-biasing circuit of a 6 × 125 μm HEMT is composed of a parallel connection of two 15 Ω thin-film resistors and two 1.2 pF metal–insulator–metal (MIM) capacitors as shown in Fig. 1. The value of the feedback resistor is selected to meet the drain Q current of the conventional biasing scheme. The process used in this demonstration requires a drain bias of −2 V and a resistance value of 7.5 Ω for a class-A operation. The bypass capacitance is selected to maximize the maximum available gain at the targeted band, especially at a high-frequency edge. The size of each self-biasing transistor is larger than that of a conventional transistor layout pattern, but a more efficient layout is possible because of the removal of the gate bias circuit. The total impedance of the self-biasing circuit includes parasitic inductance, the resistance of MIM capacitors, and via holes.

Fig. 2 presents the comparison of the simulated load–pull characteristic of the self-biased power cell and that of the standard voltage-biased transistor. Output power and efficiency are slightly decreased at about 6.6% degradation as calculated.

The schematic of the DA circuit is shown in Fig. 3. The gain cell is designed by a two-stage CSSDA gain cell to enhance the gain of the amplifier. The first stage of each CSSDA gain cell is composed of a 2 × 125 μm transistor for high gain and efficiency, and the second stage is composed of a 6 × 125 μm transistor for sufficient gain and output power. To achieve high input and output return losses and to combine output powers, the DA is designed to have eight sections. An input artificial transmission line is designed for a high input return loss. A series capacitor is used to compensate large input capacitance of the 2 × 125 μm transistor. The non-uniform DA technique is used to design the output artificial transmission line. From the transistor load–pull data, 70 Ω is the optimal resistance of each 6 × 125 μm transistor in 17 GHz. In consideration of non-uniform DA theory and the output capacitance of each power cell, the width of the microstrip line for the output artificial transmission line is varied 9–120 μm.

The simulated results are shown in Fig. 4. The typical linear gain is over 15% while maintaining acceptable input and output return losses. Even with the use of the self-biasing scheme, the typical output power is over 40 dBm, and the typical power added efficiency (PAE) is over 12%.

The proposed PA MMIC is fabricated by a commercial 0.25 μm GaN HEMT process. To mitigate self-heating and to measure the PA, the MMIC is attached to a Cu jig with eutectic bonding using AuSn. Fig. 5 shows a photograph of the chip and module.

Fig. 4(a) compares the measured S-parameters with the simulation. The proposed PA represents an average linear gain of 15 dB with adequate return loss throughout the 6−16 GHz band. Fig. 4(b) presents the continuous wave measurement of output power and PAE. The measured average output power is over 10 W, and the measured average PAE is 12%. A slight frequency shift is observed, but the amount of frequency shift is less than 1 GHz.

Table 1 compares the performances of GaN PA with a similar frequency band. The process used in this work has lower output power, efficiency, and maximum oscillation frequency than those in other works [6]. Moreover, as this work employs the self-biasing scheme, the obtained measurement result shows a degradation of output power and power efficiency. Despite these drawbacks, this work exhibits competitive measurement results and demonstrates the best performance in terms of power density because of the elimination of the bias circuits.

The proposed PA is the first reported GaN PA MMIC using self-biasing through a feedback resistor, and it raises the prospect of using the self-biasing scheme for GaN PA.

We proposed the application of the self-biasing scheme to a GaN PA MMIC and implemented a 6–16 GHz GaN DPA with self-biasing. The measured data show manageable performance degradation compared with a conventional voltage bias scheme, and the complex bias network is removed. The selfbiasing circuit also removes the negative voltage bias, thus making the proposed PA suitable for integrating into other systems.