Quadrature Wilkinson power dividers have typically been adopted to realize balanced amplifiers and as image-rejection mixers in microwave circuit design. Structurally, quadrature Wilkinson power dividers are designed to integrated the Wilkinson power divider with a 90° phase-adjusting circuit. Numerous studies have been devoted to the design of these 90° phase-adjusting circuits [1–5]. Low-pass and high-pass filters were implemented with Wilkinson power divider to obtain a 90° phase difference between output ports [1]. The phase compensated transmission lines [2] or the all-pass active filters [3] were introduced for achieving wideband 90° phase difference. The metamaterialbased quadrature power divider has also been reported for realizing broad-bandwidth [4]. On the other hand, a substrate integrated waveguide (SIW)-based quadrature power divider using lumped elements has also been described [5].

The SIW is one of the planar waveguides, constructed with two parallel via fences or bar vias between metal layers at the top and the bottom of the printed circuit board (PCB). The SIW has two distinct merits: it enables the taking of traditional waveguide components to PCB-based planar components, and reduces the hollow waveguide size by using the dielectric constant of the PCB [5–7]. However, the reported SIW quadrature power divider [5] has a narrow band with a 90° phase difference because the lumped elements on the transition structure have limitations with respect to their ability to achieve the broadband 90° phase difference.

In this paper, we propose a broadband half-mode SIW (HMSIW) quadrature Wilkinson power divider using composite right and left-handed (CRLH) transmission line (TL). The HMSIW is one of the SIW, and is half size of the SIW. The proposed CRLH-HMSIW is conducted with two lumped shunt inductors and a surface mount technology (SMT) series capacitor on the edge of the HMSIW, and the broadband Wilkinson power divider [8] is integrated with the transition structure.

Fig. 1 presents the proposed HMSIW quadrature power divider using CRLH-HMSIW. The SIW or HMSIW requires a transition circuit for use with other planar circuit devices based on microstrip (MS) or coplanar waveguide (CPW) [5,6]. The broadband MS Wilkinson power divider was designed and integrated with the transition structure between MS and HMSIW for achieving a highly integrated SIW circuit. To obtain broad-bandwidth, a tapered line was adopted for input/output matching of the power divider [9]. The fundamental mode of SIW is the TE_1,0 mode and its higher order mode starts with the TE_2,0 mode. However, the fundamental mode of the HMSIW is the TE_0.5,0 mode, with the first higher order being the TE_1.5,0 mode. The TE_1.5,0 mode has a frequency range that is three times that of the fundamental mode; therefore, the bandwidth for HMSIW is wider than that of SIW [9].

The proposed power divider splits the power to the phase adjust circuit, the proposed CRLH-HMSIW and the HMSIW. Fig. 2 shows the phase responses of the proposed CRLH-HMSIW and the HMSIW. The proposed CRLH-HMSIW phase response was designed to have 90° synchronization with the HMSIW from f₁ to f₂, since CRLH TLs lead the phase compared with right-handed (RH) TLs. The power divider was designed at f₀.

To design the proposed structure, the phase response between ϕHMSIW₁ and ϕHMSIW₂ should be selected appropriately by the length of the HMSIW. The left-handed (LH) and RH phases of the CRLH-HMSIW should be calculated according to previously described methods [4,10].

where P = -∅RH_i/f_i and Q = ∅LH_i·f_i.

Fig. 3(a) and (b) refer to the unit cell of the proposed CRLH-HMSIW and the equivalent circuit model of the unit cell. The LH section of the proposed CRLH-HMSIW has a controllable shunt inductor, L_L for L_Lvia inductance. The L_Lvia, L_L and C_Lcap values are concerned with Q from the formula (1) and (2). The Q is derived as in [4].

where N is the number of the LH unit cell.

After solving the formulas (1) and (2), the P and Q are obtained as shown in [4].

The design procedures can be summarized as follows:

where Z₀ is the characteristic impedance.

The demonstrated HMSIW quadrature power divider is shown in Fig. 4. Three target frequencies, f₁ = 4.5 GHz, f₀ = 5.5 GHz, and f₂ = 6.5 GHz are chosen to achieve broad bandwidth.

The demonstration was designed on a Taconic TLX-8 substrate (dielectric constant = 2.55, height = 0.508 mm). The HMSIW in the proposed structure has characteristic impedance (Z₀) of the power-current (Z_PI) definition of 13 Ω, which was calculated by using ANSYS HFSS ver. 14 simulation. Note that the traditional CRLH TLs can be analyzed by using the TL theory on the strip-like lines [11]. In the example provided here, the characteristic impedance of the Z_PI definition is most appropriate for the strip-like lines [12]. Therefore, the Z_PI definition is used for calculating the L and C values in the proposed structure.

To realize the CRLH-HMSIW, two PCB-embedded inductors and a Murata 0201-sized SMT capacitor are utilized. This demonstration implements the calculated design parameters from Section II with the LH section parameters being N = 1, C_Lcap = 0.8 pF and L_L = 1.3 nH. Note that total inductor value (sum of 2L_L and 2L_Lvia) of the LH section needs 0.13 nH through the formula (8). However, the value calculated from the simulation tool was L_Lvia = 0.07 nH. Therefore, L_L = 1.3 nH is necessary to meet the target, 0.13 nH inductance of the LH section.

The 50-Ω chip resistor on the input transition structure was attached for obtaining isolation between the output ports [8].

For measurement, the transition structures between HMSIW and MS were utilized, and the SMA connectors were soldered on the edge of the MS line. The measured S-parameters were carried out by using a vector network analyzer, Agilent N5230A. Fig. 5(a) and (b) show the simulated and measured S-parameters of the insertion losses (|S₂₁|, |S₃₁|), in and out return loss (|S₁₁|, |S₂₂|, and |S₃₃|), and isolation (|S₂₃|). The measured |S₂₁|, |S₃₁| show -4 ± 0.5 dB on the frequency range from 4.14 to 6.74 GHz, and the measured |S₁₁|, |S₂₂|, and |S₃₃| are better than -10 dB from 4.1 to 6.68 GHz. The |S₂₃| is less than -20 dB between output ports from 4.39 to 6.68 GHz. In Fig. 6(a), the measured amplitude imbalance is within 1 dB from 4.23 to 6.82 GHz, except that it reaches 0.56 dB at 5.39 GHz, and the measured phase difference shows 90° ± 5° from 3.84 to 6.68 GHz.

The performance comparison between the conventional SIW quadrature power divider [5] and the proposed HMSIW quadrature power divider is shown in Table 1. The proposed structure has more wide-bandwidth than [5], with better isolation performance.

In this paper, a broadband HMSIW quadrature Wilkinson power divider using CRLH TL is presented. The proposed structure shows good amplitude imbalance, within 1 dB, 90° phase difference, and excellent isolation performance between output ports. The measurement results show good agreements with the simulation.