Microwave Negative Group Delay Circuit: FilterSynthesis Approach
 Author: Park Junsik, Chaudhary Girdhari, Jeong Junhyung, Jeong Yongchae
 Publish: Journal of electromagnetic engineering and science Volume 16, Issue1, p7~12, 31 Jan 2016

ABSTRACT
This paper presents the design of a negative group delay circuit (NGDC) using the filter synthesis approach. The proposed design method is based on a frequency transformation from a lowpass filter (LPF) to a bandstop filter (BSF). The predefined negative group delay (NGD) can be obtained by inserting resistors into resonators. To implement a circuit with a distributed transmission line, a circuit conversion technique is employed. Both theoretical and experimental results are provided for validating of the proposed approach. For NGD bandwidth and magnitude flatness enhancements, two secondorder NGDCs with slightly different center frequencies are cascaded. In the experiment, group delay of 5.9±0.5 ns and insertion loss of 39.95±0.5 dB are obtained in the frequency range of 1.935–2.001 GHz.

KEYWORD
Bandstop Filter , Frequency Transformation , Filter Approach , Low Pass Filter Prototype , Negative Group Delay

I. INTRODUCTION
Most media exhibit a normal propagation characteristic called subluminal velocity, where the speed of propagation of individual timeharmonic components is slower than the speed of light,c, in vacuum at all frequencies. However, in a specific and narrow frequency band of signal attenuation or at an anomalous dispersion frequency, the group velocity is observed to be greater than
c . This abnormal wave propagation is called superluminal velocity or negative group velocity [1,2]. At first, the concept of superluminal velocity seems to defy causality. However, many practical experiments have shown that the concept of superluminal velocity does not violate the definition of a causal system [3–5].One example of the concept of superluminal velocity is the negative group delay (NGD); this refers to the phenomenon whereby an electromagnetic wave traverses a medium in such a manner that its amplitude envelope is advanced rather than delayed [6]. Recently, many studies have designed negative group delay circuits (NGDCs) and used them in practical applications such as enhancing the efficiency of a feedforward amplifier [7], shorting delay lines [8], realizing nonFoster reactive elements [9], and minimizing beamsquint problems in seriesfed antenna arrays systems [10].
The conventional design method of active and passive NGDCs is based on only single
RLC resonators [1118]. The NGD bandwidth and magnitude flatness should be as wide as possible for applications in RF circuits and systems. However, conventional NGDCs suffer from smaller NGD bandwidth and poor magnitude flatness. To overcome these problems, some studies have attempted to design NGDCs using different methods such as cascading the number of resonators with slightly different center frequencies [16] and crosscoupling between resonators [17].In this study, a filter synthesis approach is applied to design an NGDC. In this proposed method, circuit element values are obtained from lowpass filter (LPF) prototypes by applying a frequency transformation.
II. DESIGN EQUATIONS ANALYSIS
Fig. 1(a) shows the Butterworth LPF prototype. The element values of the LPF are obtained as follows [19].
where
N is the order of the filter. Fig. 1(b) shows the structure of the proposed NGDC. The lumped elements of the proposed NGDC are easily obtained from the LPF by applying the following frequency transformation [19].where
Δ andω _{0} are the 3dB fractional bandwidth (FBW) and center frequency of the NGDC, respectively. The elements values of the shuntseries branch (L_{ssi} ,C_{ssi} ) are given as follows.where
Z _{0},g_{i} , andω _{0} are the port impedance,i th prototype element value, and center frequency of the NGDC, respectively. Similarly, the element values of the seriesparallel branch (L_{spj} ,C_{spj} ) are given as follows.The resistors are inserted into the shunt and series resonators to obtain the required NGD. The values of these resistors are obtained by analyzing the shuntseries and seriesparallel branch elements [18], respectively. The resistances in the shuntseries branch of the NGDC for the required NGD are given as follows.
where
τ andα are the GD and correction factor, respectively. Similarly, the resistance in the seriesparallel branch of the NGDC is given are given as follows.A correction factor
α is substituted into (5) and (6) to consider the fact that each resonator contributes to GD and increases the overall GD so that it is higher than the required value for the overall circuit asN increases. Substitutingα into these equations compensates for the deviation from the required value.Fig. 2 shows the synthesized results of the NGDC with different numbers of stages
N . The specifications and calculated circuit element values of the proposed NGDC are shown in Tables 1 and 2, respectively. As shown in Fig 2(a), the NGD bandwidth increases slightly withN . However, the signal attenuation (magnitude ofS _{21}) also increases for the same maximum achievable GD, which can be compensated using general purpose gain amplifiers. Therefore, the signal attenuation (SA) of the proposed NGDC should be as small as possible so that the number of gain amplifiers can be reduced. The NGD bandwidth and maximum SA of the simulated circuits are shown in Table 3. From Table 3, it is clear that a tradeoff between the NGD, insertion loss (magnitude ofS _{21}), NGD bandwidth, and number of stagesN should be considered. Fig. 2(b) shows the phase characteristics of the NGDC withN =2 andN =3. As seen from Fig. 2(b), the phase ofS _{21} increases with frequency (positive slope) in the case of an NGDC, indicting the presence of NGD.The proposed NGDC shown in Fig. 1(b) consists of both shuntseries (
R_{ssk} ,L_{ssk} ,C_{ssk} ) and seriesparallel (R_{spk} ,L_{spk} ,C_{spk} ) lumped elements. A series parallelresonator is difficult to implement at the microwave frequencies owing to the limited feasibility of the designed lumped elements.To overcome this problem, the circuit conversion technique can be applied to convert the seriesparallel lumped elements (
R_{spk} ,L_{spk} ,C_{spk} ) into shuntseries lumped elements (R_{cssi} ,L_{cssi} ,C_{cssi} ) using admittance inverters (J inverters), as shown in Fig. 3. The corresponding conversion relations are given as follows.Theoretically, the value of the
J inverter can be chosen arbitrary. However, in practice,J inverters should be chosen carefully because their physical dimensions must be realizable without any difficulties. Fig. 4 shows the overall structure of proposed NGDC; it consists ofJ inverters and shuntseriesLC resonators. TheJ inverters can be implemented using quarterwavelength transmission lines. The shuntseriesLC resonators can be implemented using either shortcircuited halfwavelength or opencircuited quarterwavelength resonators [19].III. SIMULATION AND EXPERIMENTAL RESULTS
To validate the proposed design method, a second order NGDC was designed and fabricated on a substrate with dielectric constant (
ε_{r} ) of 2.2 and thickness (h ) of 31 mils. The goal was to design an NGDC with GD of 6 ns at a center frequency of 1.97 GHz. In this work,J inverters and shuntseriesLC resonators are implemented withλ /4 transmission line and shortcircuitedλ /2 transmission lines, respectively.As shown by the results in the previous sections, the NGD bandwidth of the proposed circuit is narrow. One of the ways to increase the NGD bandwidth is to increase
N . However, increasingN cannot provide a large increase in the NGD bandwidth, as shown in Fig. 2; however, the insertion loss is increased. Another way to employ an NGDC with a wider NGD bandwidth is to cascade NGDCs operating at slightly different center frequencies as shown in Fig. 5. Therefore, in this study, to enhance the NGD bandwidth and magnitude flatness, twostage NGDCs with center frequencies of 1.932 and 2 GHz and FWB of 10% are cascaded. Fig. 5 shows the physical dimensions of the designed NGDC.Fig. 6 shows the simulation and measurement results of the fabricated cascaded twostage NGDC and comparison with NGDCs with
N =4 andN =5. The measurement results agreed well with the simulation results. The measured GD time and insertion loss were 5.9±0.5 ns and 39.95±0.5 dB, respectively, in the frequency range of 1.935–2.001 GHz.These results also show that the NGD bandwidth and magnitude flatness are wider than those of NGDCs with
N = 4 andN =5 and conventional NGDCs [1117]. However, the tradeoff among the NGD, bandwidth and magnitude flatness should be considered. The small fraction of NGD and insertion loss differences between the simulation and the measurement are due to the parasitic components of the resistors. Fig. 7 shows a photograph of the fabricated NGDC.Table 4 shows a performance comparison of the proposed NGDC with those in previous works. Owing to the tradeoff among the maximum achieved GD (GD_{max}), maximum SA (SA_{max}) and NGD bandwidth (NGDBW), the figure of merit (FOM) of NGD circuits can be defined as follows.
As seen from Table 4, the proposed NGDC provides the highest FOM and best performance in terms of GD/magnitude flatness even though the SA is higher than of some previously proposed NGDCs [13,1618].
IV. CONCLUSION
In this paper, a filter synthesis approach is applied to design a NGDC. The circuit elements of the proposed filter can be obtained from LPF prototype elements. The proposed circuit was implemented with a distributed transmission line using a circuit conversion technique. An experiment was performed to validate the proposed design method. The measurement results agreed well with the simulation results. The proposed NGDC shows the highest FOM, large negative group delay, good magnitude flatness, and wider negative group delaybandwidth.

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[Fig. 1.] (a) Lowpass filter prototype and (b) proposed structure of a negative group delay circuit.

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[Fig. 2.] Synthesized results of proposed negative group delay circuit (NGDC) with different numbers of stages N: (a) group delay/magnitude and (b) phase characteristics.

[Table 1.] Specifications of negative group delay circuits

[Table 2.] Element values of negative group delay circuits (NGDCs) with GD=6 ns

[Table 3.] Calculated NGD BW and SAmax for different numbers of filter stages

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[Fig. 3.] Seriesparallel to shuntseries circuit transformation.

[Fig. 4.] Proposed negative group delay circuit with Jinverters and shuntseries RLC circuits.

[Fig. 5.] Structure of cascaded twostage negative group delay circuit (NGDC) for NGD bandwidth and magnitude flatness enhancements. Physical dimensions: L1=22.90, L2=26.10, L3=5, L4=55.2, L5=57.36, W1=3.54, W2=0.32, W3=0.54, W4=0.36, W5=0.58 (unit: mm).

[Fig. 6.] Simulated and measurement results of cascaded twostage negative group delay circuit.

[Fig. 7.] Photograph of fabricated negative group delay circuit.

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[Table 4.] Performance comparison of the proposed NGDC with those in previous works