A High Gain and High Harmonic Rejection LNA Using High Q Series Resonance Technique for SDR Receiver
 Author: Kim Byungjoon, Kim Duksoo, Nam Sangwook
 Organization: Kim Byungjoon; Kim Duksoo; Nam Sangwook
 Publish: Journal of electromagnetic engineering and science Volume 14, Issue2, p47~53, 00 June 2014

ABSTRACT
This paper presents a high gain and high harmonic rejection lownoise amplifier (LNA) for softwaredefined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the inband signal voltage and attenuate the outband signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a 0.13μm CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain (
S _{21}) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between 5.7 and 10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2V supply.

KEYWORD
High Gain , High Harmonic Rejection , High Quality Factor Series Resonance , Impedance Transformation , SDR.

Ⅰ. INTRODUCTION
Recently, the number of wireless communication services has been increasing steadily. With an everincreasing number of frequency bands and diverse wireless communication standards, frontend complexity and costs have risen. Therefore, the conventional receiver architecture requires more chips. Consequently, a softwaredefined radio (SDR) receiver is needed to reduce complexity and costs [1]. An SDR receiver can accomplish this, but it can also suffer from outofband interferences because it deals with wideband signals at the RF frontend [2].
Among various mixer architectures in SDR receivers, a hardswitching mixer is preferred, due to its superior gain and low noise characteristic [3,4].
However, the desired signal is aliased with the interferers which are located around local oscillator (LO) odd order harmonic frequencies when downconverted to the baseband at the hardswitching mixer stage. Multiphase mixers have been suggested to suppress RF signals around LO harmonics [3,5,6]; however, they have the following drawbacks: 1) the seventh harmonic is not rejected and causes aliasing; 2) the third and fifth harmonic rejection (HR) performance is restricted by amplitude and phase mismatches; and 3) the complexity and size increase. The third HR ratio at the mixer stage is practically constrained to 30 to 40 dB, but much more rejection is needed to attenuate harmonic interferences with 40 to 0 dBm power down to the noise floor [7]. Therefore, a high HR ratio is required before the mixer stage.
In [8], a design technique is provided for high HR; however, this does not address the resistance of the inductor or the induced gate noise. In [9], the research also neglects these noise sources and the fabricated and measured results are not described. The present paper analyzes a high Q resonance technique with these noise sources and provides a design guideline.
In this paper, Section II discusses the high Q series resonance technique, while Section III describes the circuit implementation in detail. Section IV shows the experimental results of the demonstrated lownoise amplifier (LNA) circuit. Finally, a conclusion is given in Section V.
Ⅱ. THE HIGH Q SERIES RESONANCE TECHNIQUE
A MOSFET senses a voltage at the gatesource capacitor. Series resonance amplifies the inband signal voltage and attenuates the outband signal voltage at capacitor. Among the LNA architectures that use series resonance, the inductively degenerated LNA (LCS LNA) [10] is popular and widely used. However, the voltage gain and HR are limited because the Q is constrained. A source degeneration technique simply provides input matching, although it decreases the Q.
Techniques for improving the Q of the LNA input passive network have previously been presented [8]. In [8], theoretically, a value of Q that can be obtained approximately two times larger than the LCS LNA can be obtained when all parameters and conditions are same except input network. This is achieved by abandoning the degeneration inductor. However, an even higher Q is still needed to attain sufficiently high gain and a high HR ratio with low power operation. Moreover, this study did not consider the resistance of the inductor or the induced gate noise.
A high Q series resonance LNA (HQLNA) can overcome these problems, as shown in Fig. 1. A source impedance transformation provides higher Q resonance, as well as high gain and high HR. A source impedance transformation can be attained by a variety of methods, and a transmission line is a good approach. A multiband operation is also easily achieved by adjusting the resonance frequency, and this can be accomplished by changing the gatesource capacitor
C_{tot} . The smallestC_{tot} equalsC_{gs} (S _{1} andS _{2} are off), while largestC_{tot} equalsC_{gs} +C _{1} +C _{2} (S _{1} andS _{2} are on).Fig. 2 shows the equivalent circuit of the proposed technique. The source voltage
v_{s} and the source impedanceR_{s} are transformed tov_{st} andZ_{st} , respectively. These values are determined by the transmission line parameters, which are the characteristic impedance Z_{0} and length of the linel_{TL} . Therefore, a transmission line with proper characteristic impedance and length can produce a low source resistance,R_{st} , which is the resistive part ofZ_{st} . As a result, high Q series resonance is obtained. An inductor,L_{g} , is used for resonance with capacitance, and theR_{l,g} is the resistance of the inductorL_{g} .The following analyses (gain and harmonic rejection ratio analysis) were performed with exclusion of the bonding effect. In this work, we minimized this effect by carried out multiple down bonding. Parasitic capacitances (routing parasitic capacitances, pad capacitances) also result in resistive input. If the bonding effect generates several tens of resistive impedance, then the effect must be included in the analysis. In that case, the
R_{l,g} changes toR_{l,g} +R_{bond} , whereR_{bond} signifies resistive impedance from the bonding effect. The noise figure (NF) analysis is not changed.1. Gain Analysis
The transformed source impedance
Z_{st} can be written as:Therefore, the Q of the circuit can be written as:
where ω_{0} is the series resonance frequency,
C_{in} is the equivalent input capacitance (equal toC_{tot} when theX_{st} is in the inductive region, and equal toC_{tot} //C_{st} when theX_{st} is in the capacitive region andC_{st} is an equal capacitance toX_{st} ), andR_{l,g} is the inductor resistance. If the transmission line is assumed to be lossless, then power is conserved. The input passive network voltage gainA_{v} is calculated as:Fig. 3 shows that the Q and voltage gain are related to the resistance part of the source impedance.
The calculated Q and
A_{v} are compared with the Q andA_{v} of the LCS LNA as follows:and
where
Q_{LCS} is Q of the LCS LNA andA_{v,LCS} isA_{v} of the LCS LNA.Eqs. (4) and (5) indicate that the HQLNA can have a much higher Q and voltage gain than the LCS LNA if the source impedance
R_{S} (usually 50 Ω) is much higher than the inductor resistance, and this is correct under several GHz ranges.2. Harmonic Rejection Ratio Analysis
The third HR ratio can be calculated in a similar manner to the gain analysis. The third HR ratio is shown as:
where
R_{st3rd} is the resistive part of the transformed source impedance at the third harmonic frequency. This equation reveals that if the reactance part is much larger than theR_{st3rd} , then largeL_{g} , smallR_{st} , or smallR_{st3rd} makes high HR.3. Noise Figure Analysis
Gain and HR are important factors in an LNA. The derived equations show that gain is maximized when
R_{st} equalsR_{l,g} (usually under several ohms). However, the NF is also an important factor in an LNA, and an optimumR_{st} value exists for the minimum NF. The noise factor can be calculated in a similar manner to that shown in [1012]:where
Here,
ω_{T} is the unity gain frequency (equal tog_{m} /C_{gs} ),g_{d0} is the zerobias drain conductance of the device, γ is the coefficient of the channel thermal noise, α is the ratio between the device transconductance and the zerobias drain conductance, δ is the factor of the induced gate noise, and c is the correlation coefficient between the induced gate noise and the drain noise.From (8), the optimum source impedance,
R_{st _Fmin} , can be determined:As the
R_{st} of the source impedance decreases to a given point, the noise factor decreases due to the increased gain suppressing the MOSFET channel noise. However, as the resistive part of the source impedance decreases beyond a given point, the inductor resistance and the induced gate noise become the dominant noise sources, and they increase. The optimumR_{st} depends on the process, bias, and resistance of the inductor.Ⅲ. HQLNA IMPLEMENTATION
A HQLNA was designed and implemented using 0.13μm CMOS technology, as shown in Figs. 4 and 5. The amplifiers had cascode configurations to improve the reverse isolation and reduce the Miller capacitance between the gate and the drain of the transistor,
M _{1}. The LNA was biased at 8 mA with a 1.2V supply. The transistor size was carefully chosen. A large transistor consumes a great deal of power and generates large gatesource capacitances. On the other hand, a small transistor can easily suffer from other parasitic capacitances, including pad capacitance and routing capacitances. The active region of this chip is 270 μm × 450 μm, excluding pads size.Next, the proper transmission line was chosen. A 24.8Ω characteristic impedance with 3.7 cm length line was selected to transform the source impedance,
R_{S} , which was 50 Ω, to 15.5, 14.4, 13.0, and 12.1 Ω at 0.64, 0.70, 0.82, and 1.07 GHz, respectively.The inductor,
L_{g} , and the capacitors,C _{1} andC _{2}, were chosen to generate series resonance at the abovementioned frequencies. In our case, the inductor and capacitors were 39 nH, 0.6 pF, and 1.1 pF, respectively. The switches,S _{1} andS _{2}, were implemented by MOSFET.Finally, the load stage was composed of only a 50 Ω resistor for measurement. This creates a low gain; however, it rarely contributes to the gainfrequency relation. Therefore, it will not interrupt the verification of the high Q resonance technique. In a practical case, the load stage can be composed of a wideband resonance circuit or high value resistor, and this provides more gain.
Fig. 6 and Table 1 show the simulation results for the HQLNA and the conventional LCS LNA. They have the same architecture (cascade), same transistor size (width and length), same bias voltage (0.67 V), and same supply voltage (1.2 V); only the input matching part is different. The HQLNA SW11 mode is compared with the LCS LNA, and the HQLNA exhibited higher gain, higher HR, and lower NF.
In the analysis, the
R_{st} decreased as with the gain and the HR increased as. The simulation results show that. Moreover, as predicted, the SW00 mode NF increased dramatically because theR_{st} decreased beyond the optimal value for the minimum NF. In this region, the inductor resistance noise and the gateinduced noise became dominant noise sources.Ⅳ. MEASUREMENT RESULTS
Fig. 7 shows the measured scattering (
S ) parameters. Series resonance occurred at 0.64, 0.71, 0.83, and 1.07 GHz, corresponding to the SW11, SW10, SW01, and SW00 modes, respectively. The measuredS _{21}s of the LNA were 12.1, 13.2, 15.4, and 17.4 dB at each resonance frequency with the corresponding SW modes. The measured S_{22}s were well below 10 dB when the frequency was higher than 0.4 GHz, indicating that the load stage has little effect onS _{21} when the frequency is higher than 0.4 GHz. Fig. 8 shows the measured NFs. The measured NFs were 2.7, 2.9, 2.8, and 3.3 dB in the SW11, SW10, SW01, and SW00 modes, respectively. The measured third HR ratios are over 30 dB at each mode. The achieved maximum third HR ratio is 43 dB at SW00 mode. These high third HR ratios will relax the specification of the filter design for an SDR receiver. The gain, NF, and HR results were well matched with the analysis and simulation results.Linearity was measured by two tone input signals, which are separated 1MHz from the center frequency at the upper and lower sides in each operating mode. The measured IIP3s were 5.7, 6.1, 8, and 10.8 dBm in the SW11, SW10, SW01, and SW00 modes, respectively.
For comparison, Table 2 gives a summary of the measured results of operation frequency, NF, and third HR for several LNAs. A wideband LNA in [3] does not provide third HR. The SW00 mode achieves the highest third HR ratio. HQLNA has slightly lower gain, due to it uses 130nm CMOS process and load stage consists of pure 50 Ω resistor. This 50 Ω resistor load provides more precise observation about input network effects; however, it provides low gain. In practice, a load can consist of a resonance circuit or a higher resistor, and it can provide more gain.
V. CONCLUSION
In this paper, we presented a high Q input series resoance LNA to obtain high voltage gain, a high HR ratio, and low NF, as well as to support multiband operation for an SDR receiver. This technique was simply achieved by exploiting switchable capacitor banks, one inductor, and a transmission line. The high HR will relax the specification of the filter when using a hardswitching mixer.
These effects were demonstrated by measurement of the implemented LNA. The LNA supports four operation bands (0.64, 0.71, 0.83, and 1.07 GHz) with high forward gain (12.1, 13.2, 15.4, and 17.4 dB), low NF (2.7, 2.9, 2.8, and 3.3 dB), high third HR ratios (32, 32, 35, and 43 dB), and low power consumption (9.6 mW with 1.2 V). The proposed technique is a promising option for highperformance, lowcost SDR receivers.

[Fig. 1.] Simplified schematic of the high Q series resonance lownoise amplifier input network.

[Fig. 2.] The equivalent input circuit of the high Q series resonance lownoise amplifier.

[Fig. 3.] Calculated Q and input network voltage gain Av versus the resistance part of the source impedance, Rst. (The Ctot = 0.56 pF and Rl,g = 5 Ω are assumed. w0 = 1.07 GHz).

[Fig. 4.] Complete schematic of the LNA with the proposed technique.

[Fig. 5.] (a) Chip photograph of the lownoise amplifier (LNA) and (b) photograph of the fabricated LNA on the printed circuit board.

[Fig. 6.] Simulated gain of the high Q series resonance lownoise amplifier (HQLNA) and conventional the inductively degenerated lownoise amplifier (LCS LNA).

[Table 1.] The HQLNA and conventional LCS LNA simulation results

[Table 2.] Comparative summary about the frequency, NF, and third HR of LNAs

[Fig. 7.] Measured Sparameters of the high Q series resonance lownoise amplifier (HQLNA): (a) S21, (b) S11, (c) S12, and (d) S22.

[Fig. 8.] Measured noise figure of the high Q series resonance lownoise amplifier (HQLNA).