Scaling Rules for Multi-Finger Structures of 0.1-μ m Metamorphic High-Electron-Mobility Transistors
- Author: Ko Pil-Seok, Park Hyung-Moo
- Organization: Ko Pil-Seok; Park Hyung-Moo
- Publish: Journal of electromagnetic engineering and science Volume 13, Issue2, p127~133, 30 June 2013
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ABSTRACT
We examined the scaling effects of a number of gate_fingers (
N ) and gate_widths (w ) on the high-frequency characteristics of 0.1-μ m metamorphic high-electron-mobility transistors. Functional relationships of the extracted small-signal parameters with total gate widths (wt ) of differentN were proposed. The cut-off frequency (fT ) showed an almost independent relationship withwt ; however, the maximum frequency of oscillation (fmax ) exhibited a strong functional relationship of gate-resistance (Rg ) influenced by bothN andwt . A greaterwt produced a higherfmax ; but, to maximizefmax at a givenwt , to increaseN was more efficient than to increase the single gate_width.
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KEYWORD
Scaling Rule , HEMT , Small-Signal Parameters , Gate Width.
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High-electron-mobility transistors (HEMTs) have been highlighted as essential high-frequency devices for various state-of-the-art microwave or millimeter-wave application systems, such as satellite communication, electronic warfare, radiometry, base stations, and smart weapons [1-3]. These systems require not only excellent radio frequency (RF) characteristics but also high-power performances for their specific applications [4]. The enhancement of power characteristics can be achieved by improving the current level or breakdown voltage of the HEMTs. A variety of methods have been used to increase the power performance of HEMTs these include the GaN/AlGaN material system [5,6], the gate-fieldplate technique [7,8], and the adoption of composite channel systems [9,10]. Most of these methods have focused on the enhancement of transistor power by increasing the breakdown voltage. These technologies, however, have some drawbacks, such as high cost and difficulty in material growth of the composite channel HEMTs, poor RF characteristics of the GaN HEMTs, and low electron mobility and large increase in the parasitic capacitances of the gate-field-plated HEMTs. As a consequence, in many application achieving a large current level by simply increasing the transistor gate_width (
w ) has been one of the most economic and practical methods in terms of circuit design and device fabrication.A very long gate width or multi-finger gates are effective, but an increase in w gives rise to a large gate resistance (
Rg ), thereby causing degradation of noise characteristics [11] and the maximum frequency of oscillation (fmax ) [12]. Therefore, it preferable to achieve a long effective gate width with no significant increase or even reduction inRg . The use of a wide-head T-gate was reported [11] as an exemplary method for suppressingRg ; however, this technique has a limit in expanding the gate head because high source-to-drain channel resistance is unavoidable under increased source-drain spacing for accommodating a wide gate-head dimension; consequently, the structural instability of the T-gate increases in this structure. Even though studies [13-15] have documented the critical role ofRg in the high-frequency characteristics of HEMTs based on a small-signal- equivalent circuit model, there has been minimal investigation in reducingRg in HEMTs with long gate_ widths or multi-finger gates. In this study, we investigated the multi-finger structures of the HEMTs affectingRg and high-frequency characteristics. BecauseRg is strongly influenced by a number of gate_fingers (N ) and gate_widths (w ) of the device structure, we examined the effects of all these parameters onRg and the device characteristics by using various combinations of structural parameters for the 0.1-μ m depletion-mode InGa- As/InAlAs metamorphic HEMT (MHEMT). To investigate the effects ofN andw , 12 different gate peripheries were fabricated with various gate fingers (2, 4, and 6) and gate widths (25, 40, 50, and 70μ m). Except for the variations inN andw , we maintained the same epitaxial structure, gate length of 0.1-μ m, and source-drain spacing of 2-μ m for all fabricated devices, as described in the next section.The MHEMT micrograph of the HEMT with four fingers is shown in Fig. 1.
As shown in Fig. 2, the MHEMT epitaxial structure was grown by molecular beam epitaxy on a semi-insulating GaAs substrate. The structures consisted of the following layers from the bottom: a 1000-nm InxAl1-xAs linearly graded buffer layer with an indium mole fraction, x, linearly graded from 0 to 0.5; a 300-nm undoped In0.52Al0.48As buffer layer; a silicon delta-doped plane (1.3×1012/cm2), a 4-nm undoped In0.52Al0.48As spacer layer; a 23-nm undoped In0.53Ga0.47As channel layer; a 3-nm undoped In0.52Al0.48As spacer layer; a silicon delta- doped plane (4.5×1012/cm2); a 15-nm undoped In0.52 Al0.48As Schottky barrier layer; and a 15-nm n-type In0.53Ga0.47As cap layer (6×1018/cm3). The grown epitaxial layer showed a two-dimensional electron carrier density (
ns ) of about 3.5×1012/cm2 and a Hall mobility of about 9,700 cm2/Vsec at room temperature.To fabricate the MHEMTs, we first isolated active areas by using mesa etching with an etchant of phosphoric acid/H2O2/H2O (1:1:60) to reduce the thickness to 200-nm. AuGe/Ni/Au (140/30/160 nm) ohmic metallization showed a specific contact resistance of about 5×10―7 Ω-cm2 after rapid thermal annealing at 320℃ for 60 seconds in a vacuum. An electron beam lithography system (EBPG-4HR, Leica Microsystems Ltd., Buffalo Grove, IL, USA) was used to perform 0.1-
μ m T-shaped gate patterning upon completion gate_recess, gate metallization was performed by evaporating Ti/Au (50/400 nm) followed by metal lift-off. The MHEMTs were passivated with the Si3N4 films (80 nm). Finally, a Ti/Au (30/700 nm) air-bridge interconnection was made to connect the source pad.The DC characteristics of each MHEMT were measured in an HP 4156 DC parameter analyzer. Drain current (
Ids ) versus gate voltage (Vgs ) and transfer characteristics of the MHEMTs (at a drain voltage [Vds ] of 1.2 V) were measured at variousN andw values. With the total gate width (wt ), the saturation drain current (Idss ) and maximum transconductance (gm,max ) were linearly increased at constant slopes of about 0.58 mA/μ m and 0.57 mS/μ m, respectively, as shown in Fig. 3. Thewt is hereafter defined as “total gate width” and given by the product ofN andw . The scaling rules for these parameters are then simply expressed as:High-frequency characteristics of the fabricated MHEMTs were measured in the frequency range of 0.5 to 50 GHz using an HP8510C network parameter analyzer (Agilent Technologies, Palo Alto, CA, USA). Cut-off frequency (
fT ) andfmax were determined by extrapolating theh21 andU gain curves, respectively, at a slope of 6 dB/octave. The DC and RF data were measured from each gate type of the MHEMTs at six different dies a 2.5×2.5 cm2 specimen. The averagefT andfmax from the MHEMTs with 12 different gate types measured from six different dies were plotted respectively in Fig. 4 with their standard deviations (1σ ). ThefT increased slightly in a smallwt region and was saturated to a frequency of about 100 GHz; on the other hand, thefmax decreased continuously with thewt in our whole experimental range ofwt , and the reduction ratio was a function ofN .[Fig. 3.] Idss and gm versus wt of the metamorphic high-electron- mobility transistors at various N.
To examine the effects of
N andwt on the small-signal parameters directly affectingfT andfmax , all the parameters shown in Eqs. (2) and (3) [16,17] were extracted from the fabricated MHEMTs by the Dambrine method [18] and curve-fitted to simple functions ofwt . As shown in Table 1, gate-to-source capacitance (Cgs ), gate-to-drain capacitance (Cgd ), drain conductance (Gds ), and intrinsic transconductance (gm,int ) were proportional towt .However, intrinsic resistance (
Ri ) and source resistance (Rs ) were inversely proportional towt . All these parameters were functions ofwt . But were not functions ofN ; however, one exception wasRg , which was a function of bothwt andN .The relationships of the fitted parameters with
wt can be explained as follows.Cgs is a function ofCgso which is gate-to-source capacitance per unit gate width, and therefore is expressed aswhere
Cgso is about 0.00089 pF/μ m in our case. In the case of theCgd , y-axis intercepts should also be considered. A non-zeroCgd at zerowt can be formed between the gate bus line and drain pad and this parasitic capacitance, in fact, has been observed in earlier studies [13,19,20]. In our case, the y-axis intercept ofCgd was about 0.0049 pF, and the proportionality constant was about 0.000087 pF/μ m. The linear relationship ofGds withwt can be understood such that the total sourcedrain conductance is given by (dIds /dVds per unit gate width)×wt , and the corresponding proportionality constant was about 0.0355 mS/μ m in our case.Rs andRi were inversely proportional towt and curve-fitted in the same way with the proportionality constants of about 190 and about 1,580 Ω?μ m, respectively. The linear increase ofgm,int withwt can be explained by the linear scaling rule ofgm,ext withwt , as shown in Eq. (1); the proportionality constant was about 0.614 mS/μ m.Rg is a function of bothN andwt , as shown in Fig. 5, and can be expressed as Eq. (5) whereρG is the resistivity of the gate metal, andA is the cross-sectional area of the gate.Ro is the y-axis intercept obtained by linear curve fitting. This relationship can be obtained by assuming the gradual (linear) reduction in gate current (Ig ) density as the open end is approached, as illustrated in Fig. 6, and an essentially uniform displacement current fed from the bottom of the gate to the channel region of the HEMTs [21]. In the open-ended gate structure shown in Fig. 6,Ig and the infinitesimal change ofVgs (δVgs ) overδx are given by Eqs. (6) and (7),where
L andh are gate-length and gate-height, respectively. The minus sign in Eq. (7) indicates that gate voltage decreases with increasingx . Atx =0,Vgs is equal toVgs0 , gate terminal voltage. Gate voltageVgs (x ) is obtained by integrating Eq. (7) with the boundary condition atx =0.The average gate voltage is equal to the integral of
Vgs (x ) fromx =0 toW and then divided byW . After carrying out the definition, we find the average value to beThe average intrinsic gate resistance inside the gate electrode region from
x =0 tow is then given by:Investigations have focused on
Ro ,Rg whenw approaches zero [21,22]; however, the model forRo , is still not fully understood. In our case, the y-axis intercepts of the MHEMTs (N =2, 4, and 6) range from about 0.6 to 0.9 Ω, with the corresponding proportionality constants of about 0.0123, 0.0021, and 0.000515 Ω/μ m, respectively, as shown in Fig. 4. Therefore, the scaling rules of the small-signal parameters can be summarized as follows:fT andfmax can be calculated by substituting each small-signal parameter of Eqs. (2) and (3) with the curve-fitting equations in Table 1. The calculated results are plotted in Fig. 4 with measurements at eachN andwt . Good agreement was obtained from the calculatedfT andfmax with the measured data over the entire range of measuredwt . Some discrepancies between the measurements and the calculations are due to the errors associated with the device process in pattern lithography. Becausegm andCgs are both proportional towt , as shown in Eq. (2),fT is not a function ofwt . From our calculations contained in Fig. 3,fT showed an almost constant frequency of about 100 GHz above awt of about 100-μ m. Below thiswt fT a slight increase withwt owing to the y-axis intercept effect ofCgd , as observed in many earlier studies [23,24]. Sincefmax is a strong function ofRg as shown in Eq. (3), it is affected by bothN andwt . If we assume thatGds is negligible (ideal case without channel length modulation), Eq. (3) is simply expressed as [25]:Because
fT is almost constant, we therefore obtain:Eq. (15) shows that a careful combination of
N andwt is required to achieve a maximumfmax in a given device technology. Obviously, a greaterwt produces a higherfmax ; however, to increase the number of gate-fingers by reducing the unit gate width is more efficient than to simply increase the single-gate_width in order to maximizefmax at a givenwt .We investigated the effects of
N andw on the RF characteristics of 0.1-μ m depletion-mode multi-finger MHEMTs and their small-signal parameters.Cgs ,Cgd ,Gds , andgm,int were all proportional towt ; however,Ri andRs were inversely proportional towt .Rg was proportional to bothwt and 1/N 2.fT andfmax were calculated by using the small-signal models and curve-fitting equations from each extracted small-signal parameters. The calculations showed good agreements with the measurements, and the results demonstrated that a greaterwt produces a higherfmax ; however, to maximizefmax at a givenwt , increasing the number of gate_fingers is more efficient than increasing the single-gate width. On the other hand,fT showed an almost independent relationship withwt . To our knowledge, this is the first successful demonstration of multi-finger gate-width scaling effects (individual effect ofN andwt ) on HEMT devices operating at millimeter-wave frequencies.-
10. Chen Y. C., Chin P., Ingram D., Lai R., Grundbacher R., Barsky M., Block T., Wojtowicz M., Tran L., Medvedev V., Yen H. C., Streit D. C., Brown A. 1999 "Composite-channel InP HEMT for Wband power amplifiers" [in Proceedings of the 11th International Conference on Indium Phosphide and Related Materials] P.305-306
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19. Kwon Y., Tutt M., Ng G. I., Pavlidis D., Brock T., Marsh P., Oh J., Castagne J., Linh N. T. 1991 "Gate-recess and device geometry impact on the microwave performance and noise properties of 0.1 μm InAlAs/InGaAs HEMT’s" [in Proceedings of IEEE/ Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits] P.141-150
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[Fig. 1.] Micrograph of the fabricated chip with the fourfinger metamorphic high-electron-mobility transistors.
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[Fig. 2.] Epitaxial structure of the metamorphic high-electron- mobility transistor.
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[Fig. 3.] Idss and gm versus wt of the metamorphic high-electron- mobility transistors at various N.
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[Fig. 4.] Average fT and fmax as functions of the wt measured from the metamorphic high-electron-mobility transistors of twelve different gate types and six different dies (calculation, solid line; measurement, symbols).
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[Table 1.] Fitting equations of the small-signal parameters
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[Fig. 5.] Extracted Rg as functions of wt (fitting, solid line; measurement, symbols).
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[Fig. 6.] Distribution of gate current in the gate-width direction.